Technology·News & analysis
Samsung will build Nvidia's custom memory base dies at TSMC, report says
Nvidia asked all three of its memory suppliers to make the bottom layer of its new NVHBM chips on TSMC's 3nm process, and Samsung said yes.

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Samsung will use TSMC's 3nm process to make the base die for Nvidia's custom NVHBM memory, the Seoul Economic Daily reports, citing industry sources.
Nvidia asked all three of its suppliers, Samsung, SK hynix and Micron, to build that layer the same way. It is the first time Samsung has partnered with TSMC at the HBM manufacturing stage. Samsung is also testing its own foundry as a backup in case demand outgrows TSMC's capacity.
What to know
- Nvidia asked Samsung, SK hynix and Micron to make the base die of its custom NVHBM memory on TSMC's 3nm process, the Seoul Economic Daily reports.
- Samsung agreed after an internal review, its first partnership with TSMC at the HBM manufacturing stage.
- Nvidia also wants the memory layers themselves standardized on the sixth-generation 1c DRAM process.
- Samsung keeps making its standard HBM, and custom HBM for customers like AMD, entirely in-house.
Samsung will use TSMC's factories to make a key part of Nvidia's next custom AI memory, the Seoul Economic Daily reported on Sunday, citing industry sources. Reuters picked up the report hours later. The interesting question: why would a company that runs its own chip factories send this job to TSMC?
First, what's a base die?
AI chips need huge amounts of fast memory sitting right next to them. The standard answer is high-bandwidth memory, or HBM: several memory chips stacked on top of each other like a tiny skyscraper.
That skyscraper has two kinds of floors:
- Core dies: the memory chips in the stack, where the data lives.
- Base die: the logic chip at the very bottom, which connects the whole stack to the processor.
The core dies are classic memory, which Samsung, SK hynix and Micron know inside out. The base die is closer to a regular processor chip, so it benefits from the most advanced logic manufacturing. That is where TSMC, the world's largest contract chipmaker, comes in.
What is Nvidia's NVHBM?
Nvidia unveiled NVHBM in a blog post on August 26. In normal HBM, the memory controller, the logic that directs traffic between memory and processor, sits on the processor itself. NVHBM moves Nvidia's own controller down into the base die.
Nvidia's numbers, compared with standard HBM4E:
- Bandwidth: up to 30% more.
- Power: 15% less for the memory.
- Space: up to 25% more room on the processor for actual computing.
Counterpoint Research adds some context. It notes that standard HBM4 talks to the processor over more than 2,000 signal pins across 32 channels. With the controller inside the stack, Nvidia can replace that wide bus with a narrower, faster link of its own design.
In real life Think of a busy restaurant. Normally the head waiter stands in the dining room and runs back and forth to the kitchen. NVHBM moves that person into the kitchen doorway, so orders move faster and the dining room gets an extra table.
What did Nvidia ask for?
According to the Seoul Economic Daily, Nvidia asked all three memory makers picked for NVHBM to build it the same way:
- Base die: made on TSMC's 3nm process.
- Core dies: standardized on the sixth-generation DRAM process known as 1c.
- Suppliers: Samsung, SK hynix and Micron.
Why it matters: the newspaper reports two reasons. Different manufacturing methods across suppliers make it hard to get the same performance from a single Nvidia design. And one standard process means Nvidia doesn't have to validate each supplier's product separately.
That lines up with what Nvidia said in August. It is "establishing a standard NVHBM implementation, available from multiple memory providers," which it says cuts the work needed to qualify memory from several suppliers.
Why is Samsung's yes a big deal?
Until now, Samsung made both the core dies and the base die for all the HBM it supplies. The industry calls that a turnkey approach: one company, start to finish.
Samsung's Device Solutions division, which also runs its foundry business, reviewed Nvidia's request and accepted it, the Seoul Economic Daily reports. This is the first time Samsung and TSMC have partnered from the HBM manufacturing stage.
They aren't strangers, though. About four years ago, the two worked together to make Samsung's HBM compatible with TSMC's packaging process for connecting memory to GPUs. That was about how the chips fit together, not how they're made.
Is Samsung giving up on its own factories?
No. The change covers NVHBM only, according to the report. Here's what stays in-house:
- Standard HBM4: Samsung began mass-producing it earlier this year, as the first company in the world to do so. Its base die uses Samsung's own 4nm process.
- HBM4E: the next generation, now in mass-production validation, also on Samsung's 4nm base die.
- Other customers: custom HBM for buyers such as AMD keeps the turnkey approach.
The core dies for HBM4 and HBM4E are made on 1c lines at Samsung's Hwaseong and Pyeongtaek campuses in South Korea.
Samsung is also keeping a backup plan. "Samsung is validating whether it can also make the NVHBM base die at its own foundry," an industry official told the newspaper. "This is a hedge in case NVHBM demand exceeds TSMC's production capacity."
What about SK hynix and Micron?
They were already heading the same way, Crypto Briefing reports:
- Micron: has confirmed plans to outsource both its HBM4E and NVHBM base dies to TSMC, and expects volume production by 2027.
- SK hynix: used TSMC's 12nm process for earlier HBM4 base dies and is now prioritizing 3nm for future HBM, including custom versions.
The big picture: memory makers are concentrating on the memory itself, while foundries take on the advanced logic layer underneath. For TSMC, that means making Nvidia's processors and, more and more, the base of the memory that feeds them. We saw how much AI demand already means for TSMC in its record third quarter.
Is the idea itself new?
Not completely, and the analysts are upfront about it. Counterpoint Research notes that chip designer Marvell described the same kind of design, with the controller in the base die, back in December 2024.
What Nvidia adds, according to Counterpoint, is a named customer and a rack standard to attach it to. Five days after the NVHBM news, MediaTek adopted NVLink Fusion and will offer it to its own chip customers, the research firm says, with $3.5 billion of Nvidia money attached.
By the numbers: Counterpoint says the one claim it can check directly is a 67% smaller area for the connection circuitry, which follows from the lower pin count. The bandwidth and power figures, it notes, are measured against HBM4E, which isn't shipping yet.
Nvidia, for its part, says NVHBM is built on the same technology it will use for its own future GPUs.
Who is NVHBM actually for?
NVHBM is part of NVLink Fusion, Nvidia's program for companies that design their own AI chips but want to plug into Nvidia's rack systems. Nvidia says Amazon's Annapurna Labs is the first partner, starting with its Trainium4 chip.
"NVHBM represents a new architectural approach to advancing high-bandwidth memory performance and efficiency," said Nafea Bshara, vice president of Annapurna Labs at Amazon, in Nvidia's announcement.
What's next: the report cites unnamed sources, and we found no public comment from Nvidia, Samsung or TSMC on the request. NVHBM is still months away from volume. More on the company on our Nvidia topic page.
What it means for you
- Nothing changes on your desk: NVHBM is for data center AI chips, not phones or gaming PCs.
- AI could get cheaper to run: memory that is faster and uses less power helps the data centers behind the AI apps you use.
- One factory matters even more: TSMC now sits under both the processors and part of the memory, so its capacity shapes how fast new AI hardware arrives.
The bottom line
Nvidia wants its custom memory built the same way by all three suppliers, with the base layer made at TSMC. Samsung agreed for NVHBM while keeping its own factories for everything else, plus a backup plan. It is a small change in one layer of a chip, and a big sign of how AI is reshaping who makes what.
Key facts
- Base die process
- TSMC 3nm
- Core die process
- 1c, sixth-generation DRAM
- Suppliers asked
- Samsung, SK hynix, Micron
- NVHBM claims vs HBM4E
- Up to 30% more bandwidth, 15% less power
- NVHBM unveiled
- August 26, 2026
Got questions?
Quick answers, plain wordsWhat is NVHBM?
NVHBM is Nvidia's custom version of high-bandwidth memory, announced on August 26, 2026. It moves Nvidia's own memory controller into the base die at the bottom of the memory stack. Nvidia says that brings up to 30% more memory bandwidth and 15% lower memory power than standard HBM4E.
What is a base die?
HBM is a stack of memory chips sitting on one logic chip at the bottom, called the base die. The memory chips above it, called core dies, store the data. The base die handles the logic that connects the stack to the processor.
What did Nvidia ask its suppliers to do?
According to the Seoul Economic Daily, Nvidia asked Samsung, SK hynix and Micron to make the NVHBM base die on TSMC's 3nm process, and to make the core dies on the sixth-generation DRAM process known as 1c.
Why does Nvidia want everyone to use TSMC?
The Seoul Economic Daily reports that different manufacturing methods across suppliers make it hard to get the same performance from one design. Using the same process also means Nvidia does not have to validate each supplier's product separately.
Is this the first time Samsung works with TSMC?
Not entirely. The two worked together about four years ago on packaging compatibility for connecting HBM to GPUs. But this is the first time they partner from the HBM manufacturing stage, the newspaper reports.
Will Samsung stop making its own base dies?
No. Samsung keeps its in-house approach for standard HBM4 and HBM4E, which use its own 4nm foundry process for the base die, and for custom HBM made for other customers such as AMD.
What about SK hynix and Micron?
Crypto Briefing reports that Micron plans to outsource both its HBM4E and NVHBM base dies to TSMC, with volume production expected by 2027. SK hynix used TSMC's 12nm process for earlier HBM4 base dies and is now prioritizing 3nm for future HBM, the outlet reports.
Who will use NVHBM?
Nvidia says NVHBM is offered through NVLink Fusion, its program for companies building their own AI chips. Amazon's Annapurna Labs is the first partner, starting with its Trainium4 chip.
Has Nvidia confirmed the TSMC request?
The Seoul Economic Daily cites unnamed industry sources, and Reuters repeated the report. We did not find a public comment from Nvidia, Samsung or TSMC on the request.
Will this make AI tools faster for me?
Not directly or soon. NVHBM is for data center chips, and it is not shipping yet. Faster, more efficient memory in data centers can eventually help AI services run more cheaply and quickly.
SourcesSeoul Economic Daily
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